Pcbnew


Related kicad pages

Layers

Probably the best place to start is to look at the layers used in PcbNew. Find the Layers Manager toolbar.

Some of the Nomenclature needs clarification:

Displaying layers

Pcbnew can display technical layers (like solder mask) but only in "high contrast mode"

Pads (and all items) that are on the selected layer are shown using this layer color Others are displayed in dark gray color.

Of course, in normal display mode, these layers are not displayed.

Board design Steps

Setting up DRC(Design Rules Check)

Importing Netlist and associated dialogs

click on the netlist button and look at the dialog
select netlist file
Bad Tracks Deletion needs to be set to "Delete"
Exchange Module 
Change allows updating modules
Extra Footprints 
Keep allows keeping of hardware holes etc..
Timestamp 
This causes the modules to be identified by their timestamp rather than the reference number. uesed when there are changes to the Reference numbers - back up first before trying this.
Rebuild Board Connectivity
Reconnects the board parts based on _______ ?(net list? any exceptions? ) - need a precise explanation of what happens here.
Footprint test
Returns no modules if non found. What else?

Placement

Routing

Hand Routing

Auto Routing

Freerouter

Most people are using Freerouter.

Built-in Auto Router

Creating Copper Ground planes - Zones

Vias

Alternate Via Drill

From the Tracks and Vias Sizes dialog box:

This feature is used when some vias must have a specific drill size (which differs from the default drill size). You can adjust the "Alternate Via Drill" to a correct value, and for some vias you can select this alternate value (by the pop-up menu) This job is more easy if you have chosen a bigger (or smaller) via diameter for theses vias, because the pop-up menu has a command to export the current via drill to all vias which have the same diameter (put the mouse cursor on such a via, and by the pop-up menu (edit via option) select the alternate via drill for this via, and export the via drill to other identical vias (command edit via/export via drill to other id vias)

Working with 4 layer boards

Setting up power layers
Setting up mixed layers

Panelize PCB

There are times when you want to put several copies on one pannel.

options are ticked and click OK. Your board layout will then move.

A copy of your PCB will appear in the centre of the drawing page (that's why we moved the first copy)

then move the first copy back onto the board.


This method works if you want to place several different boards onto one drawing.

Another method if you want a copy of the same board, is to block select your board in the same way, then move it to the position you want, but instead of left click, right click and you will get a context menu. select copy block, and your board will be copied to the new location.

CAM Plot, Drill

What exactly does "Solder mask ratio clearance mean?
Hole count
The number of holes in the PCB is found in the -drl.rpt file. They are listed by number and size.

Fiducial Marks

No one has ever asks for fiducials - and they spend time removing them and putting in their own. But if you insist: Global and/or panel fiducials should ideally be located at three points of the grid. Locate a lower left fiducial at the 0,0 datum point and two fiducials located in positive X and Y directions. These three marks help for correcting of non-linear distortions (scaling, stretch and twist).

Global fiducials should be located on all PCB layers that contain components to be mounted with automated equipment. Using other circuit objects (via-holes, etc.) ends up being a compromise.

Module Position File

Modedit

This is to create the modules AKA footprints. Once again, remember to always make a copy of a supplied footprint and save it in your personal library directory in your own personal xxx.mod file

Module fields Reference and Value

  VAL** 

reflects the Part name that pointed to the module.

Insert attibutes

Under module_editor/module_properties/attributes

insertion machines) This attribute is most useful for surface mount components (SMDs).

connectors or inductors created by a particular track shape (as sometimes seen in microwave modules).

Hole Types

  1. Standard - through hole pad
  2. SMD Surface mount (no hole) Hole has an electrical connection (used for through hole devices and/or Ground points)
  3. Connector - perhaps for an edge card connector??

Library Generation Considerations

Do not trust what is in the supplied library.

Checklist

Part Placement

 Routing

Current rating of Traces, viass

 Dimensions

Text on Silk Screen and other Layers

Tricks

Creating IPC compliant modules

To create foot prints that comply with ipc specs get LP Calculator or Lp_calculator_V2009 http://www.oldversion.com/PCB-Matrix-LP-Calculator.html(these run under wine on linux).. There are three versions of the modules one can create for surface-mount work - General purpose - high reliability and very-high density. (There are settings to get these numbers out of LP-calculator).

One important detail: these case sizes originate in metric - the imperial notation is approximate. There are two ways that cap footprints are specified - and it can generate confusion - metric and imperial - thus 0201 (02x01mils) = 0603 in metric (remind me to once again curse the creeps that stopped metrication back in the '60s). Kicad's naming should be based on the modern metric codes. Thus a 0603 becomes 1608M and there should be three versions of the decal:

1608MM - most sized
1608MN - Nominal sized
1608ML - least sized

Going on step further we could have

1608MN02 be a metric 1608 Nominal sized land with 0.2mm thick so it can match something in the 3D renderer AND there is a difference in the optimal land size depending on the height of the chip. This is also why we have C1608M and R1608M for chip-capacitors and chip-resistors respectively. ( If the footprints are well optimized, there will be slight differences in height between resistors and caps. )


I could also see having three libraries - as the SNM7351A SNL7351B SMN7351C.

Complete list of SMT_Case_Size_Codes

[1].

All of it is for supporting IPC-7351. pcb-fpw was written to support the competing opensource 'pcb' package - might work to have a script to translate the modules?

pcb-fpw is open source, so it would be possible to modify add it to the kicad suite .. seems to be written in java-bloat.


Now there is Madparts - not yet a nice package.

The separate names for a cap and resistor 0805 package seems silly unless we are using polarized caps. In which case we could have

P1608MN02

And a diode in such a case

D1608MN02

The M,N,and L are for most, Nominal and least -- describes most compromises folks would run into..

The modules should have a minimal silk screen and a part outline on the drawing level.

Custom case numbers that should probably be organized via part vendor.

Creating Module with Custom Solder-Paste

(thumbnail)
Very uglyNormally, the solder paste area is based on the pad area slightly reduced to keep paste off of non pad areas. ( See Preferences/Dimensions/Pads_Mask_Clearance /Solder_Paste_Clearance in Pcbnew.) But for parts with larger pads that provide heat-sinking, the amount of solder often needs to be reduced to keep the solder from balling up and causing the part to float to high - or keeping mask out from under packages.

In the Module Editor go to Edit Pad which brings up the Pad Properties dialog. On the bottom left under Technical Layers uncheck the SoldP_Front check-box which turns off the generation of solder-paste for this pad. Next, Using the Line, Circle, or Arc tool - draw where you want solder-paste on this pad on the SoldP_Front layer. Sometimes it is better to use the next trick to reduce the size thus reducing the height of solder due to surface tension.

It is probably the case that just a masking of the solder paste layer is all that is needed - reducing the contact area is only for extreme floating problems - if the solder paste is reduced it is likely not a problem.

Preventing floating on heatsinking pads of SM packages

See bold note above

MLF/QFN devices, which have a thermal pad on the middle of the bottom. There are two considerations here.

  1. There is the heatsinking requirement
  2. A poor copper design wrong the chip will float on a central blob of solder, resulting in unreliable soldering of the pins.

For the thermal pad footprint for a 32 pin device arrange 8 square pads around a central via, and place solder resist over the via Tented Via with the outer edge of all the pads matching the pad on the bottom of the chip. The breaks in the pad to pad area limit the height of the solder ball due to surface tension so the chip sits lower and closer to the board.

Number all the (thermal) pads as "33", so there is only one extra pin in eeschema. Connect together the pads and the via with a grid of thick tracks. The use of a tented via in this way means that the via will be solidly connected to the heat-sinking copper zone on the reverse side, whilst the tenting prevents solder wicking through the via. One could also put a via for all 9 locations bringing more heat to the opposite side of the PCB.

(thumbnail)
MLF - Center area is about 3.1 x 3.1mm


Another way to accomplish this is put a large square pad under the MLF and then turn off both the solder-mask and solder paste output in Pad Properties dialog and manually create the mask and paste in 9 zones.

similar advice here

Via in pad

Pad Shapes

The last thing you want is a full 100% paste mask on the pad when it's under the component body of a low profile component. The ability to mask the solder-paste is on the wishlist (2013).

For other parts a rounded-rectangle-pad-shape is superior to a rectangle-pad-shape because the aperture openings in the paste mask stencil have to be rounded corners anyway - and the rounded corners or oval shape helps the surface tension keep the part aliened - something that is much harder on no-lead parts.

Some people are claiming that rounded Rectangle Pad Shape are better than Oval (AKA oblong). This is not always the case - but does help sell high end CAD systems. That being said, rounded rectangular pad shapes are the IPC preference for all Lands (except BGA, CGA and LGA) including the chip parts like resistors and caps. There is

Importing DXF - DWG

Current rating rule of thumb - trace width - via size

 Other


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This information may have errors; It is not permissible to be read by anyone who has ever met a lawyer.
Use is confined to Engineers with more than 370 course hours of electronic engineering for theoretical studies.
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