The first Circuit emulator I used was Electronics workbench - an old version 4.x version. It surprised me that it worked so well and I was impressed. I tried to buy a later addition and it appears that the original programmer must have left the company - the current product gave bizarre results (92V out of an opamp that was connected to only a 24 rail!) and the company refused to sell the old one to me. I returned the product and looked at many of the packages mentioned in the news groups.
I decided on TINA after trying some of the 'free' ones and think have found it a good choice. TINA is easy to learn - it has good documentation even some 'moving cursor examples of how do do certain tasks.
While I secretly hoped that TINA was named after someone's true love, it turns out that TINA stands for Toolkit for Interactive Network Analysis". TINA comes from a ten year old Hungarian company called DesignSoft. Lead by by a Dr. Mihaly Koltai, who works with 6 full time engineers plus several part time employees, DesignSoft consists of a powerful team of software end electrical engineers. This team obviously puts their hearts and much work into creating and improving TINA. Reading between the lines, I believe they may be teachers who have created this out of their love for the subject and as a teaching tool. That being said there is nothing that keeps this from being used for very advanced applications.
Dr. Mihaly Koltai was a lecturer at TUB (Technical University of Budapest) for more than 15 years and says:
"Many of the ideas in the program came from that time [at TUB]. As you say I really invented this program out of love for the topic, but TINA was always a teamwork. Today just discussing the new features with my people, reviewing the developments, listening to the customers etc. takes most of my time."
Underneath TINA is the SPICE 3F5 engine. I don't know if it has been modified - this is the same engine used in most SPICE packages today despite the great price disparities. The TINA part of the software is the user interface which you can think of as about one half of the package.
TINA comes with a Pascal-like equation language that works with graphing and will even solve systems of equations.
About the only thing I found confusing was adding parts from internet files or the parameter extractor. That is what motivated me to write this page - my own notes to myself that I share with the web. Part of my problem is that I had no earlier experience with SPICE and found that it has more new file types than I would like to have learned about<grin>.
The following steps have been applied only to a discrete BJT, therefore, it is not known how the steps may differ for insertion of a sub-circuit, for example.
If you later re-visit the SPICELIB dir, and check the 'new_part' files, you will find three related files: new_part.LIB, new_part.TLD, and new_part.IND.
TINA supports the most common standard that of the "original" PSPICE syntax only, which means that you need to find *.CIR and *.LIB file types. I have not found any conversion software for other file types (if you know of some please email me with details). Inside some of the other file types I have found parameter information that can be hand converted into *.CIR or *.LIB files. A *.cir file is a spice macro and is similar to TINA's *.TSM file.
A *.CIR file contains a circuit and default parameter values while a *.LIB file contains substitute part parameters for the circuit to provide several variations or models of the circuit. Thus a SPICE *.CIR file is a circuit file which contains a full circuit description, which means components (standalone components, macros, and models) along with SPICE commands. I have seen the following variations of the *.CIR naming convention: *.SPI, *.CIR.TXT, *.TXT, *.CKT, *.IN (so far - and note that I've put these in all CAPS for clarity - on many Unix systems I'm sure they are using small letter extensions). The *.CIR is also referred to as a SPICE macro or a deck (SPICE deck) in the literature dating back to when SPICE was a FORTRAN program and your circuit ran as a punch-card-deck on some main-frame.
Every component that can be found under the SPICE macro models tab is a SPICE subcircuit (.subckt). The other components on the tool bar- under other tabs - are built-in TINA components and some of them - actually those which are under the semiconductors tab - can be considered as SPICE models (.model). Both (.model) and (.subckt) are not to be confused with file types - they are statements found inside SPICE files.
A SPICE LIB file is usually a catalog file which contains subcircuits (.subckt) and models (.model) which can be used in any circuit.
*.SIN is a proprietary SPICE related file; it doesn't belong to the "original" PSPICE. There are many products on the market which use the SPICE analysis engine, and they often have file types. Some contain parameter information that may be of use in creating .LIB files.
SCH: TINA's native schematic file extension. They are aware of that this may conflict with other CAD programs so *.SCH will be replaced by *.TSC in the next version of TINA (V6) due to be launched soon.
Things in the spicelib directory get loaded at startup - they can keep TINA from starting if they have errors.
LIB - SPICE LIBrarys
TLD: TINA Library Descriptor. Library descriptor files are generated by the Library Manager to add a SPICE subcircuit, model, or an S parameter model to the library. From this file TINA knows how to categorize subcircuits and how to assign a schematic-decal, know as a shape in TINA to a given subcircuit.
IND: Library INDex file. This is a real index file for SPICE subcircuits, models, and S parameter models.
- LBR is the LIBrary that is formed when using the TINA parameter extractor.
- SRC: The SouRCe file that is compiled into a CAT file. You can extend this library using the Parameter Extractor tool of TINA. This utility creates or modifies
existing SRC files.
- CAT: TINA's CATalog files. These files contain the built-in TINA components and the built-in semiconductor catalogs.
PRM: Analyses control PaRaMeter file. Used by Analysis. Set Parameters...to save those parameters which control the analysis in TINA.
DDB: TINA's shape library DataBase. It contains the shapes of the built-in components and SPICE subcircuits. A new shape can be created by the Shape Editor tool of TINA. Using this utility you can modify existing shapes or you can create a new shape for a new macro.
TSM: TINA Subcircuit Macro is the extension for macros generated by TINA. If you want to create a macro you should use the Tools. New Macro Wizard... command on the main menu. Macros can be considered as SPICE subcircuits (.Subckt).
COMPREGY.INI: contains the Tab bar information.
TDR: TINA Diagram Results
TEQ: TINA EQuation:
MPL: Internal file format, used internally for catalog files, you don't need to use an MPL files.
IPR: InterPReter file. Used by TINA's Interpreter (Tools. Interpreter).
EXA: Task list file Used in the 2 special EXAmination and training modes In these modes you can solve several exercises to train yourself by practicing problem solving and troubleshooting.
CPL: Complex Parameter List. Some components in TINA (for example general 2 port blocks under the Special tab) have special parameters which are described by a list of complex parameters in the form of a series of complex numbers.
TLC: TINA's Logic Converter utility file.
VTH0 threshold voltage at 27 ° C
B0 Beta factor at 27 ° C
l channel length modulation coefficient
RD drain resistance
RS source resistance
CGD gate-drain capacitance
CGS gate-source capacitance
JVTH temperature coefficient of the threshold voltage
JB temperature coefficient of the Beta factor
VTH0 zero-bias threshold voltage
Kp transconductance coefficient
2Fp surface potential
g bulk threshold parameter
Tox oxide thickness
m0 surface mobility [cm2 / Vs]
nmax maximum drift velocity
d width effect on threshold
Q mobility modulation
h static feedback
L channel length
W channel width
RD,RS,RG,RB serial resistance
RDS drain-source shunt resistance
IS bulk p–n saturation current
N bulk p–n emission coefficient
Fj bulk p–n bottom potential
CJBD0 zero-bias bulk-drain p–n capacitance
CJBS0 zero-bias bulk-source p–n capacitance
Mj bulk p–n grading coefficient
t bulk p–n transit time
CGS0 gate-source overlap capacitance/channel width
CGD0 gate-drain overlap capacitance/channel width
CGB0 gate-bulk overlap capacitance/channel length
POWER AMPLIFIER CIRCUIT
* RF=1K Gain should be 100
* Check open-loop gain and phase margin
Parameter values are defined by appending the parameter name followed by an equal sign and the parameter value. Model parameters that are not given a value are assigned the default values given below for each model type.
Syntax:.MODEL <model name> [AKO: <reference model name>]
+ <model type>
+ ([<parameter name> = <value> [tolerance specification]]*
+ [T_MEASURED=<value>] [[T_ABS=<value>] or
+ [T_REL_GLOBAL=<value>] or [T_REL_LOCAL=<value>]])
Examples:.MODEL RMAX RES (R=1.5 TC1=.02 TC2=.005)
.MODEL DNOM D (IS=1E-9)
.MODEL QDRIV NPN (IS=1E-7 BF=30)
.MODEL MLOAD NMOS(LEVEL=1 VTO=.7 CJ=.02pF)
.MODEL CMOD CAP (C=1 DEV 5%)
.MODEL DLOAD D (IS=1E-9 DEV .5% LOT 10%)
.MODEL RTRACK RES (R=1 DEV/GAUSS 1% LOT/UNIFORM 5%)
.MODEL QDR2 AKO:QDRIV NPN (BF=50 IKF=50m)
Arguments and Options:
<reference model name> The model types of the current model and the AKO (A Kind Of) reference model must be the same. The value of each parameter of the referenced model is used unless overridden by the current model, e.g., for QDR2 in the last example, the value of IS derives from QDRIV, but the values of BF and IKF come from the current definition. Parameter values or formulas are transferred, but not the tolerance specification. The referenced model can be in the main circuit file, accessed through a .INC command, or it can be in a .lib file.
<model name> The model name which is used to reference a particular model, and is one of the following fifteen types:
Acronym Desciption R Semiconductor resistor model C Semiconductor capacitor model SW Voltage controlled switch CSW Current controlled switch URC Uniform distributed RC model LTRA Lossy transmission line model D Diode model NPN NPN BJT model PNP PNP BJT model NJF N-channel JFET model PJF P-channel JFET model NMOS N-channel MOSFET model PMOS P-channel MOSFET model NMF N-channel MESFET model PMF P-channel MESFET model
.SUBCKT <name> [node]*
+ [OPTIONAL: < <interface node> = <default value> >*]
+ [PARAMS: < <name> = <value> >* ]
+ [TEXT: < <name> = <text value> >* ]
.SUBCKT OPAMP 1 2 101 102 17
.SUBCKT FILTER INPUT, OUTPUT PARAMS: CENTER=100kHz,
.SUBCKT PLD IN1 IN2 IN3 OUT1
+ PARAMS: MNTYMXDLY=0 IO_LEVEL=0
+ TEXT: JEDEC_FILE="PROG.JED"
.SUBCKT 74LS00 A B Y
+ OPTIONAL: DPWR=$G_DPWR DGND=$G_DGND
+ PARAMS: MNTYMXDLY=0 IO_LEVEL=0
<name> The name is used by an X (Subcircuit Instantiation) device to reference the subcircuit.
[node]* An optional list of nodes (pins). This is optional because it is possible to specify a subcircuit that has no interface nodes.
The last line in a subcircuit definition is the .ENDS line. Control lines may not appear within a subcircuit definition; however, subcircuit definitions may contain anything else, including other subcircuit definitions, device models, and subcircuit calls (see below). Note that any device models or subcircuit definitions included as part of a subcircuit definition are strictly local (i.e., such models and definitions are not known outside the subcircuit definition). Also, any element nodes not included on the .SUBCKT line are strictly local, with the exception of 0 (ground) which is always global.
XYYYYYYY N1 <N2; N3 ...> SUBNA
X1 2 4 17 3 1 MULTI
The .LIB command references a model or subcircuit library in another file.
[file_name] can be any character string that is a valid file name for the computer system.
Library files can contain any combination of the following:
· subcircuit (including .ENDS )
· .PARAM (Parameter) commands
· .FUNC (Function) commands
· .LIB commands
No other statements are allowed.
RXXXXXXX N1 N2 VALUE
R1 1 2 100
RC1 12 17 1K
RXXXXXXX N1 N2 <VALUE> <MNAME> <L=LENGTH> <W=WIDTH> <TEMP=T>
RLOAD 2 10 10K
RMOD 3 7 RMODEL L=10u W=1u
CXXXXXXX N+ N- VALUE <IC=INCOND>
CBYP 13 0 1UF
COSC 17 23 10U IC=3V
The (optional) initial condition is the initial (time-zero) value of capacitor voltage (in Volts). Note that the initial conditions (if any) apply 'only' if the UIC option is specified on the .TRAN control line.
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